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ACT8796
Six Channel Integrated Power Management IC for Handheld Portable Equipment FEATURES
* Multiple Patents Pending * Six Integrated Regulators
- 750mA PWM Step-Down DC/DC - 750mA PWM Step-Down DC/DC - 550mA PWM Step-Down DC/DC - 250mA Low Noise LDO - 250mA Low Noise LDO - 250mA Low Noise LDO
Rev1, 10-Oct-08
GENERAL DESCRIPTION
The patent-pending ACT8796 is a complete, costeffective, highly-efficient ActivePMUTM power management solution that is ideal for a wide range of portable handheld equipment. This device integrates three step-down DC/DC converters and three low dropout linear regulators (LDOs) into a single, thin, space-saving package. An I2C Serial Interface provides programmability for the DC/DC converters and LDOs. REG1, REG2 and REG3 are fixed-frequency, current-mode PWM step-down DC/DC converters that are optimized for high efficiency and are capable of supplying up to 750mA, 750mA and 550mA, respectively. REG4, REG5 and REG6 are low noise, high PSRR linear regulators that are capable of supplying up to 250mA each. The ACT8796 is available in a tiny 4mm x 4mm 24pin Thin-QFN package that is just 0.75mm thin.
* I2CTM Compatible Serial Interface
- Programmable Output Voltages - Configurable Operating Modes
* Minimal External Components * 4x4mm, Thin-QFN (TQFN44-24) Package
- Only 0.75mm Height - RoHS Compliant
APPLICATIONS
* Portable Devices and PDAs * Wireless Handhelds * DMB Enabled Devices * GPS Receivers, etc.
SYSTEM BLOCK DIAGRAM
REG2
Step-Down DC/DC
Battery nMSTR nRSTO PWRHLD ON3 SCL SDA OUT1 1.1V to 4.4V Up to 750mA System Control
OUT2 1.1V to 4.4V Up to 750mA OUT3 1.1V to 4.4V Up to 550mA OUT4 0.645V to 3.7V Up to 250mA OUT5 1.4V to 3.7V Up to 250mA OUT6 1.4V to 3.7V Up to 250mA
REG3
Step-Down DC/DC
REG4
LDO
Pb-free
REG1
Step-Down DC/DC
REG5
LDO
ACT8796
Active
REG6
LDO
PMU
TM
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ACT8796
Rev1, 10-Oct-08
FUNCTIONAL BLOCK DIAGRAM
VP1
ACT8796
SCL SDA Serial Interface REG1 SW1
To Battery
OUT1 OUT1 GP12
VP2 INL nMSTR REG2 PUSH BUTTON To Battery
SW2 OUT2 OUT2 GP12
OUT2 nRSTO
VP3
To Battery
REG3
SW3 OUT3 GP3 OUT3
PWRHLD
System Control
ON3
INL
To Battery
REFBP Reference
LDO REG4
OUT4 OUT4
LDO REG5 GA LDO REG6
OUT5 OUT5
OUT6 OUT6
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ACT8796
Rev1, 10-Oct-08
ORDERING INFORMATION
PART NUMBER
ACT8796QLGHW-T
VOUT1 VOUT2 VOUT3
3.0V 3.3V 1.35V
VOUT4 VOUT5 VOUT6 PACKAGE
1.35V 2.8V 1.8V TQFN44-24
PINS
24
TEMPERATURE RANGE
-40C to +85C
OUTPUT VOLTAGE CODES (VOUT1 AND VOUT2)
C 1.2V D 1.5V E 1.8V F 2.5V G 3.0V H 3.3V I 2.8V
: Output voltage options detailed in this table represent standard voltage options, and are available for samples or production orders. Additional output voltage options, as detailed in the Output Voltage Codes table, are available for production subject to minimum order quantities. Contact Active-Semi for more information regarding semi-custom output voltage combinations. : All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS (Restriction of Hazardous Substances) standards.
PIN CONFIGURATION
TOP VIEW
OUT6 23 OUT5 SW3 GP3 VP3 INL 24 OUT4 SCL SDA GA nMSTR nRSTO 1 2 3 4 5 6 7 OUT1 8 VP1 9 SW1 EP 10 GP12 11 SW2 12 VP2
22
21
20
19 18 17 16 OUT3 GA REFBP PWRHLD ON3 OUT2
ACT8796
15 14 13
Thin - QFN (TQFN44-24)
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ACT8796
Rev1, 10-Oct-08
PIN DESCRIPTIONS
PIN
1 2 3 4, 17 5 6 7 8 9 10 11 12 13 14 15 16 18 19 20 21 22 23 24 EP
NAME
OUT4 SCL SDA GA nMSTR nRSTO OUT1 VP1 SW1 GP12 SW2 VP2 OUT2 ON3 PWRHLD REFBP OUT3 VP3 SW3 GP3 OUT5 OUT6 INL EP
DESCRIPTION
Output Voltage for REG4. Capable of delivering up to 250mA of output current. The output is discharged to G with 650 load when disabled. Clock Input for I2C Serial Interface. Data is read on the rising edge of the clock. Data Input for I2C Serial Interface. Data is read on the rising edge of the clock. Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP12, and GP3 together at a single point as close to the IC as possible. Master Enable Input. Drive nMSTR to GA or to a logic low to enable the IC. REG1, REG2, and REG3 are enabled while nMSTR is asserted. Open-Drain Reset Output. nRSTO asserts low for the reset timeout period of 300ms whenever the IC is enabled. Output Feedback Sense for REG1. Connect this pin directly to the output node to connect the internal feedback network to the output voltage. Power Input for REG1. Bypass to GP12 with a high quality ceramic capacitor placed as close as possible to the IC. Switching Node Output for REG1. Connect this pin to the switching end of the inductor. Power Ground for REG1 and REG2. Connect GA, GP12, and GP3 together at a single point as close to the IC as possible. Switching Node Output for REG2. Connect this pin to the switching end of the inductor. Power Input for REG2. Bypass to GP12 with a high quality ceramic capacitor placed as close as possible to the IC. Output Feedback Sense for REG2. Connect this pin directly to the output node to connect the internal feedback network to the output voltage. Enable Input for REG3, ON3 is functional only when PWRHLD is driven high. Drive ON3 to a logic high to turn on the REG3. Drive ON3 to a logic low to turn off the REG3. Power Hold Input. Drive PWRHLD to logic high to enable the IC. Drive PWRHLD to a logic low to disable all regulators. Reference Noise Bypass. Connect a 0.01F ceramic capacitor from REFBP to GA. This pin is discharged to GA in shutdown. Output Feedback Sense for REG3. Connect this pin directly to the output node to connect the internal feedback network to the output voltage. Power Input for REG3. Bypass to GP3 with a high quality ceramic capacitor placed as close as possible to the IC. Switching Node Output for REG3. Connect this pin to the switching end of the inductor. Power Ground for REG3. Connect GA, GP12, and GP3 together at a single point as close to the IC as possible. Output Voltage for REG5. Capable of delivering up to 250mA of output current. The output is discharged to G with 650 load when disabled. Output Voltage for REG6. Capable of delivering up to 250mA of output current. The output is discharged to G with 650 load when disabled. Power Input for REG4, REG5 and REG6. Bypass to GA with a high quality ceramic capacitor placed as close as possible to the IC. Exposed Pad. Must be soldered to ground on PCB.
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ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
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ACT8796
Rev1, 10-Oct-08
ABSOLUTE MAXIMUM RATINGS
PARAMETER
VP1, VP2, SW1, SW2 to GP12 VP3, SW3 to GP3 SCL, SDA, INL, OUT1, OUT2, OUT3, OUT4, OUT5, OUT6, ON3, REFBP, nRSTO, PWRHLD, nMSTR to GA SW1 to VP1 SW2 to VP2 SW3 to VP3 GP12, GP3 to GA Junction to Ambient Thermal Resistance (JA) RMS Power Dissipation (TA = 70C) Operating Temperature Range Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 sec)
VALUE
-0.3 to +6
UNIT
V
-6 to +0.3 -0.3 to +0.3 30 1.8 -40 to 85 125 -55 to 150 300
V V C/W W C C C C
: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability.
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ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
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ACT8796
Rev1, 10-Oct-08
SYSTEM MANAGEMENT REGISTER DESCRIPTIONS
Table 1: Global Register Map
ADDRESS HEX 10h 11h 12h 13h 20h 21h 22h 23h 30h 31h 32h 33h 03h 40h 41h 42h 43h A7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A6 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 A5 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 A4 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 A3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A1 0 0 1 1 0 0 1 1 0 0 1 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1 D7 R R R R R R R R R R R R R R R R R DATA (DEFAULT VALUE) D6 V R R R V R R R V R R R V R R R R D5 V R R R V R R R V R R R V 0 0 0 R D4 V R R R V R R R V R R R V R V V 1 D3 V R R R V R R R V R R R V R V V 1 D2 V R R 0 V R R 0 V R R 0 V R V V 1 D1 V R R R V R R R V R R R V R V V 0 D0 V 0 R 1 V 0 R 1 V 0 R 1 V R V V R
OUTPUT
REG1 REG1 REG1 REG1 REG2 REG2 REG2 REG2 REG3 REG3 REG3 REG3 REG4 REG4 REG5 REG6 REG456CFG
KEY:
R: Read-Only bits. No Default Assigned. V: Default Values Depend on Voltage Option. Default Values May Vary. Note: Addresses other than those specified in Table 1 may be used for factory settings. Do not access any registers other than those specified in Table 1.
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ACT8796
Rev1, 10-Oct-08
SYSTEM MANAGEMENT TYPICAL PERFORMANCE CHARACTERISTICS
(VVSYS = 3.6V, TA = 25C, unless otherwise specified.)
Oscillator Frequency vs. Temperature
1.71 1.68 ACT8796-001
Frequency (MHz)
1.65 1.62 1.59 1.56 1.53 1.50 -40 -20 0 20 40 60
85
Temperature (C)
Startup Sequence
ACT8796-002
CH1
CH2
CH3
CH4
CH1: VnMSTR, 5V/div CH2: VnRSTO, 2V/div CH3: VPWRHLD, 5V/div CH4: VOUT1, 2V/div
TIME: 100ms/div
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ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
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ACT8796
Rev1, 10-Oct-08
SYSTEM MANAGEMENT ELECTRICAL CHARACTERISTICS
(VINL = 3.6V, TA = 25C, unless otherwise specified.)
PARAMETER
INL Operating Voltage Range INL UVLO Threshold INL UVLO Hysteresis Oscillator Frequency INL Supply Current nMSTR Internal Pull-Up Resistance Logic High Input Voltage Logic Low Input Voltage Logic Low Output Voltage Leakage Current nRSTO Delay Thermal Shutdown Temperature Thermal Shutdown Hysteresis
TEST CONDITIONS
INL Voltage Rising INL Voltage Falling
MIN
2.6 2.25
TYP
2.4 80
MAX
5.5 2.55
UNIT
V V mV
1.35 PWRHLD = ON3 = GA 250 PWRHLD, ON3, nMSTR PWRHLD, ON3, nMSTR ISINK = 5mA nRSTO, VnRSTO = 4.2V 240 Temperature rising Temperature falling 1.4
1.6 1.5 500
1.85
MHz A k V
0.4 0.3 1 300 160 20 360
V V A ms C C
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
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www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
SYSTEM MANAGEMENT I2C INTERFACE ELECTRICAL CHARACTERISTICS
(VINL = 3.6V, TA = 25C, unless otherwise specified.)
PARAMETER
SCL, SDA Low Input Voltage SCL, SDA High Input Voltage SCL, SDA Leakage Current SDA Low Output Voltage SCL Clock Period, tSCL SDA Data In Setup Time to SCL High, tSU SDA Data Out Hold Time after SCL Low, tHD SDA Data Low Setup Time to SCL Low, tST SDA Data High Hold Time after Clock High, tHP
TEST CONDITIONS
MIN
1.4
TYP
MAX
0.4
UNIT
V V
1 IOL = 5mA fSCL clock freq = 400kHz 2.5 100 300 Start Condition Stop Condition 100 100 0.3
A V s ns ns ns ns
Figure 1: I2C Serial Bus Timing
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ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
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ACT8796
Rev1, 10-Oct-08
SYSTEM MANAGEMENT FUNCTIONAL DESCRIPTION
General Description
The ACT8796 offers an array of system management functions that allow it to provide optimal performance in a wide range of applications. Manual Enable Due to Asserting nMSTR Low System startup is initiated when the user presses the push-button, asserting nMSTR low. When this occurs, REG1, REG2, REG3, and REG4 are enabled and nRSTO is asserted low to hold the microprocessor in RESET for 260ms. nRSTO goes highZ upon expiration of the reset timer, de-asserting the processor's reset input and allowing the microprocessor to initiate its power up sequence. Once the power-up routine is successfully completed, the microprocessor must assert PWRHLD so that the ACT8796 remains enabled after the push-button is released by the user. Upon completion of the startup sequence the processor assumes control of the power system and all further operation is softwarecontrolled. Manual Enable Due to Asserting PWRHLD High The ACT8796 is compatible with applications that do not utilize its push-button control function, and may be enabled by simply driving PWRHLD to a logic-high to enable REG1, REG2, and REG4. In this case, the signal driving PWRHLD controls enable/disable timing, although software-controlled enable/disable sequences are still supported if the processor assumes control of the power system once the startup sequence is completed. Shutdown Sequence Once a successful power-up routine is completed, the system processor controls the operation of the power system, including the system shutdown timing and sequence. When using the application circuits shown in Figure 2, the nIRQ signal is asserted when nMSTR is asserted low, providing a simple means of alerting the system processor when the user wishes to shut the system down. Asserting nIRQ interrupts the system processor, initiating an interrupt service routine in the processor which will reveal that the user pressed the push-button. The microprocessor may validate the input, such as by ensuring that the push-button is asserted for a minimum amount of time, then initiates a software controlled power-down routine, the final step of which is to de-assert the PWRHLD input, disabling the regulators and shutting the system down.
I2C Serial Interface
At the core of the ACT8796's flexible architecture is an I2C interface that permits optional programming capability to enhance overall system performance. To ensure compatibility with a wide range of system processors, the ACT8796 uses standard I2C commands; I2C write-byte commands are used to program the ACT8796, and I2C read-byte commands are used to read the ACT8796's internal registers. The ACT8796 always operates as a slave device, and is addressed using a 7-bit slave address followed by an eighth bit, which indicates whether the transaction is a read-operation or a write-operation, [1011011x]. SDA is a bi-directional data line and SCL is a clock input. The master initiates a transaction by issuing a START condition, defined by SDA transitioning from high to low while SCL is high. Data is transferred in 8-bit packets, beginning with the MSB, and is clocked-in on the rising edge of SCL. Each packet of data is followed by an Acknowledge (ACK) bit, used to confirm that the data was transmitted successfully. For more information regarding the I2C 2-wire serial interface, go to the NXP website: http://www.nxp.com
System Startup and Shutdown
The ACT8796 features a flexible control architecture that supports a variety of software-controlled enable/disable functions that make it a simple yet flexible and highly configurable solution. The ACT8796 is automatically enabled when either of the following conditions exists: 1) nMSTR is asserted low, or 2) PWRHLD is asserted high. If either of these conditions is true, the ACT8796 enables REG1, REG2, REG4, and may be REG3 powering up the system processor so that the startup and shutdown sequences may be controlled via software. These startup conditions are described in detail below.
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ACT8796
Rev1, 10-Oct-08
SYSTEM MANAGEMENT FUNCTIONAL DESCRIPTION (CONT'D)
nMSTR Enable Input
In most applications, connect nMSTR to an active low, momentary push-button switch to utilize the ACT8796's closed-loop enable/disable functionality. If a momentary-on switch is not used, drive nMSTR to GA or to a logic low to initiate a startup sequence.
nIRQ Output
Figure 2 shows two simple circuits that can be used to generate nIRQ, a processor interrupt signal, which can be used as part of the ACT8796's pushbutton control logic. This signal is typically used to drive the interrupt input of the system processor, and is useful in a variety of software-controlled enable/disable control routines. Figure 2A provides an active-low, open-collector push-button status output that sinks current when nMSTR is driven to a logiclow. Figure 2B provides an active-high, opencollector push-button status output that sources current when nMSTR is driven to a logic-low.
Enable/Disable Inputs
The ACT8796 provides two manual enable/disable inputs, PWRHLD and ON3. PWRHLD is the master enable input. When driven high, PWRHLD enables REG1, REG2, and REG4, and also activates the enable/disable control logic for the other regulators. ON3 is the enable input for REG3, and is active when either of the following conditions exists: 1) nMSTR is asserted low, or 2) PWRHLD is asserted high.
Thermal Shutdown
The ACT8796 integrates thermal shutdown protection circuitry to prevent damage resulting from excessive thermal stress, as may be encountered under fault conditions. This circuitry disables all regulators if the ACT8796 die temperature exceeds 160C, and prevents the regulators from being enabled until the IC temperature drops by 20C (typ).
Power-On Reset Output
The ACT8796 integrates a 260ms power-on reset generator, reducing system size and cost. nRSTO is an open-drain output. Connect a 10k or greater pull-up resistor from nRSTO to an appropriate voltage supply. nRSTO asserts low upon startup and remains low until the reset-timeout period expires, at which point nRSTO goes high-Z. Figure 2: Simple Circuits
VCC
OUT2 100k 100k
INL 500k PB
nMSTR
ACT8796 OUT2 100k
VCC
nIRQ PB CPU ACT8796
nIRQ 100k
(A)
(B)
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ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS ELECTRICAL CHARACTERISTICS (REG1)
(VVP1 = 3.6V, TA = 25C, unless otherwise specified.)
PARAMETER
VP1 Operating Voltage Range VP1 UVLO Threshold VP1 UVLO Hysteresis Standby Supply Current Shutdown Supply Current Output Voltage Regulation Accuracy Line Regulation Load Regulation Current Limit Oscillator Frequency PMOS On-Resistance NMOS On-Resistance SW1 Leakage Current Power Good Threshold Minimum On-Time
TEST CONDITIONS
Input Voltage Rising Input Voltage Falling
MIN
3.1 2.9
TYP
3 80 130
MAX
5.5 3.1
UNIT
V V mV
200 1 +1.8% +1.8%
A A V %/V %/mA A
REG1 is disabled, VVP1 = 4.2V VNOM1 < 1.3V, IOUT1 = 10mA VNOM1 1.3V, IOUT1 = 10mA VVP1 = Max(VNOM1 + 1V, 3.2V) to 5.5V IOUT1 = 10mA to 750mA 0.85 VOUT1 20% of VNOM1 VOUT1 = 0V ISW1 = -100mA ISW1 = 100mA VVP1 = 5.5V, VSW1 = 5.5V or 0V 1.35 -2.4% -1.2%
0.1 VNOM1 VNOM1 0.15 0.0017 1.1 1.6 530 0.28 0.20
1.85
MHz kHz
0.50 0.35 1
A %VNOM1 ns
94 70
: VNOM1 refers to the nominal output voltage level for VOUT1 as defined by the Ordering Information section.
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ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
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ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS REGISTER DESCRIPTIONS
Note: See Table 1 for default register settings.
Table 2: REG1 Control Register Map DATA D7
R R R R
ADDRESS
10h 11h 12h 13h
D6
VRANGE R R R
D5
R R R
D4
R R R
D3
VSET R R R
D2
R R W/E
D1
R R OK
D0
MODE R ON
R: Read-Only bits. Default Values May Vary. W/E: Write-Exact bits. Read/Write bits which must be written exactly as specified in Table 1
Table 3: REG1 Control Register Bit Descriptions ADDRESS
10h 10h 10h 11h 11h 12h 13h ON MODE
NAME
VSET VRANGE
BIT
[5:0] [6] [7] [0] [7:1] [7:0] [0]
ACCESS
R/W R/W R R/W R R R/W
FUNCTION
REG1 Output Voltage Selection REG1 Voltage Range Selection 0 1
DESCRIPTION
See Table 4 Min VOUT = 1.1V Min VOUT = 1.25V READ ONLY
Mode Selection
0 1
PWM/PFM Forced PWM READ ONLY READ ONLY
REG1 Enable
0 1 0 1
REG1 Disable REG1 Enable Output is not OK Output is OK WRITE-EXACT READ ONLY
13h 13h 13h
OK
[1] [2] [7:3]
R W/E R
REG1 Power-OK
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ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS REGISTER DESCRIPTIONS CONT'D
Table 4: REG1/VSET[ ] Output Voltage Setting REG1/VSET[5:4] REG1/VSET[3:0] 00
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
(N/A): Not Available
REG1/VRANGE[ ] = [0] 01
N/A N/A 1.100 1.125 1.150 1.175 1.200 1.225 1.255 1.280 1.305 1.330 1.355 1.380 1.405 1.430
REG1/VRANGE[ ] = [1] 11
1.860 1.890 1.915 1.940 1.965 1.990 2.015 2.040 2.065 2.090 2.115 2.140 2.165 2.190 2.200 2.245
10
1.455 1.480 1.505 1.530 1.555 1.585 1.610 1.635 1.660 1.685 1.710 1.735 1.760 1.785 1.810 1.835
00
1.250 1.300 1.350 1.400 1.450 1.500 1.550 1.600 1.650 1.700 1.750 1.800 1.850 1.900 1.950 2.000
01
2.050 2.100 2.150 2.200 2.250 2.300 2.350 2.400 2.450 2.500 2.550 2.600 2.650 2.700 2.750 2.800
10
2.850 2.900 2.950 3.000 3.050 3.100 3.150 3.200 3.250 3.300 3.350 3.400 3.450 3.500 3.550 3.600
11
3.650 3.700 3.750 3.800 3.850 3.900 3.950 4.000 4.050 4.100 4.150 4.200 4.250 4.300 4.350 4.400
N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
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ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS ELECTRICAL CHARACTERISTICS (REG2)
(VVP2 = 3.6V, TA = 25C, unless otherwise specified.)
PARAMETER
VP2 Operating Voltage Range VP2 UVLO Threshold VP2 UVLO Hysteresis Standby Supply Current Shutdown Supply Current Output Voltage Regulation Accuracy Line Regulation Load Regulation Current Limit Oscillator Frequency PMOS On-Resistance NMOS On-Resistance SW2 Leakage Current Power Good Threshold Minimum On-Time
TEST CONDITIONS
Input Voltage Rising Input Voltage Falling
MIN
3.1 2.9
TYP
3 80 130
MAX
5.5 3.1
UNIT
V V mV
200 1 +1.8% +1.8%
A A V %/V %/mA A
REG2 Disabled, VVP2 = 4.2V VNOM2 < 1.3V, IOUT2 = 10mA VNOM2 1.3V, IOUT2 = 10mA VVP2 = Max(VNOM2 + 1V, 3.2V) to 5.5V IOUT2 = 10mA to 750mA 0.85 VOUT2 20% of VNOM2 VOUT2 = 0V ISW2 = -100mA ISW2 = 100mA VVP2 = 5.5V, VSW2 = 5.5V or 0V 1.35 -2.4% -1.2%
0.1 VNOM2 VNOM2 0.15 0.0017 1.1 1.6 530 0.28 0.20
1.85
MHz kHz
0.50 0.35 1
A %VNOM2 ns
94 70
: VNOM2 refers to the nominal output voltage level for VOUT2 as defined by the Ordering Information section.
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www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS REGISTER DESCRIPTIONS
Note: See Table 1 for default register settings.
Table 5: REG2 Control Register Map ADDRESS
20h 21h 22h 23h
DATA D7
R R R R
D6
VRANGE R R R
D5
R R R
D4
R R R
D3
VSET R R R
D2
R R W/E
D1
R R OK
D0
MODE R ON
R: Read-Only bits. Default Values May Vary. W/E: Write-Exact bits. Read/Write bits which must be written exactly as specified in Table 1
Table 6: REG2 Control Register Bit Descriptions ADDRESS
20h 20h 20h 21h 21h 22h 23h ON MODE
NAME
VSET VRANGE
BIT
[5:0] [6] [7] [0] [7:1] [7:0] [0]
ACCESS
R/W R/W R R/W R R R/W
FUNCTION
REG2 Output Voltage Selection REG2 Voltage Range Selection 0 1
DESCRIPTION
See Table 7 Min VOUT = 1.1V Min VOUT = 1.25V READ ONLY
Mode Selection
0 1
PWM/PFM Forced PWM READ ONLY READ ONLY
REG2 Enable
0 1 0 1
REG2 Disable REG2 Enable Output is not OK Output is OK WRITE-EXACT READ ONLY
23h 23h 23h
OK
[1] [2] [7:3]
R W/E R
REG2 Power-OK
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 16 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS REGISTER DESCRIPTIONS CONT'D
Table 7: REG2/VSET[ ] Output Voltage Setting REG2/VSET[5:4] REG2/VSET[3:0] 00
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
(N/A): Not Available
REG2/VRANGE[ ] = [0] 01
N/A N/A 1.100 1.125 1.150 1.175 1.200 1.225 1.255 1.280 1.305 1.330 1.355 1.380 1.405 1.430
REG2/VRANGE[ ] = [1] 11
1.860 1.890 1.915 1.940 1.965 1.990 2.015 2.040 2.065 2.090 2.115 2.140 2.165 2.190 2.200 2.245
10
1.455 1.480 1.505 1.530 1.555 1.585 1.610 1.635 1.660 1.685 1.710 1.735 1.760 1.785 1.810 1.835
00
1.250 1.300 1.350 1.400 1.450 1.500 1.550 1.600 1.650 1.700 1.750 1.800 1.850 1.900 1.950 2.000
01
2.050 2.100 2.150 2.200 2.250 2.300 2.350 2.400 2.450 2.500 2.550 2.600 2.650 2.700 2.750 2.800
10
2.850 2.900 2.950 3.000 3.050 3.100 3.150 3.200 3.250 3.300 3.350 3.400 3.450 3.500 3.550 3.600
11
3.650 3.700 3.750 3.800 3.850 3.900 3.950 4.000 4.050 4.100 4.150 4.200 4.250 4.300 4.350 4.400
N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 17 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS ELECTRICAL CHARACTERISTICS (REG3)
(VVP3 = 3.6V, TA = 25C, unless otherwise specified.)
PARAMETER
VP3 Operating Voltage Range VP3 UVLO Threshold VP3 UVLO Hysteresis Standby Supply Current Shutdown Supply Current Output Voltage Regulation Accuracy Line Regulation Load Regulation Current Limit Oscillator Frequency PMOS On-Resistance NMOS On-Resistance SW3 Leakage Current Power Good Threshold Minimum On-Time
TEST CONDITIONS
Input Voltage Rising Input Voltage Falling
MIN
3.1 2.9
TYP
3 80 130
MAX
5.5 3.1
UNIT
V V mV
200 1 +1.8% +1.8%
A A V %/V %/mA A
REG3 Disabled, VVP3 = 4.2V VNOM3 < 1.3V, IOUT3 = 10mA VNOM3 1.3V, IOUT3 = 10mA VVP3 = Max(VNOM3 + 1V, 3.2V) to 5.5V IOUT3 = 10mA to 550mA 0.65 VOUT3 20% of VNOM3 VOUT3 = 0V ISW3 = -100mA ISW3 = 100mA VVP3 = 5.5V, VSW3 = 5.5V or 0V 1.35 -2.4% -1.2%
0.1 VNOM3 VNOM3 0.15 0.0017 0.85 1.6 530 0.35 0.23
1.85
MHz kHz
0.60 0.40 1
A %VNOM3 ns
94 70
: VNOM3 refers to the nominal output voltage level for VOUT3 as defined by the Ordering Information section.
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 18 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS REGISTER DESCRIPTIONS
Note: See Table 1 for default register settings.
Table 8: REG3 Control Register Map DATA D7
R R R R
ADDRESS
30h 31h 32h 33h
D6
VRANGE R R R
D5
R R R
D4
R R R
D3
VSET R R R
D2
R R W/E
D1
R R OK
D0
MODE R ON
R: Read-Only bits. Default Values May Vary. W/E: Write-Exact bits. Read/Write bits which must be written exactly as specified in Table 1
Table 9: REG3 Control Register Bit Descriptions ADDRESS
30h 30h 30h 31h 31h 32h 33h ON MODE
NAME
VSET VRANGE
BIT
[5:0] [6] [7] [0] [7:1] [7:0] [0]
ACCESS
R/W R/W R R/W R R R/W
FUNCTION
REG3 Output Voltage Selection REG3 Voltage Range Selection 0 1
DESCRIPTION
See Table 10 Min VOUT = 1.1V Min VOUT = 1.25V READ ONLY
Mode Selection
0 1
PWM/PFM Forced PWM READ ONLY READ ONLY
REG3 Enable
0 1 0 1
REG3 Disable REG3 Enable Output is not OK Output is OK WRITE-EXACT READ ONLY
33h 33h 33h
OK
[1] [2] [7:3]
R W/E R
REG3 Power-OK
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 19 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS REGISTER DESCRIPTIONS CONT'D
Table 10: REG3/VSET[ ] Output Voltage Setting REG3/VSET[5:4] REG3/VSET[3:0] 00
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
(N/A): Not Available
REG3/VRANGE[ ] = [0] 01
N/A N/A 1.100 1.125 1.150 1.175 1.200 1.225 1.255 1.280 1.305 1.330 1.355 1.380 1.405 1.430
REG3/VRANGE[ ] = [1] 11
1.860 1.890 1.915 1.940 1.965 1.990 2.015 2.040 2.065 2.090 2.115 2.140 2.165 2.190 2.200 2.245
10
1.455 1.480 1.505 1.530 1.555 1.585 1.610 1.635 1.660 1.685 1.710 1.735 1.760 1.785 1.810 1.835
00
1.250 1.300 1.350 1.400 1.450 1.500 1.550 1.600 1.650 1.700 1.750 1.800 1.850 1.900 1.950 2.000
01
2.050 2.100 2.150 2.200 2.250 2.300 2.350 2.400 2.450 2.500 2.550 2.600 2.650 2.700 2.750 2.800
10
2.850 2.900 2.950 3.000 3.050 3.100 3.150 3.200 3.250 3.300 3.350 3.400 3.450 3.500 3.550 3.600
11
3.650 3.700 3.750 3.800 3.850 3.900 3.950 4.000 4.050 4.100 4.150 4.200 4.250 4.300 4.350 4.400
N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 20 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS TYPICAL PERFORMANCE CHARACTERISTICS
(ACT8796QLCIA, VVP1 = VVP2 = VVP3 = 3.6V, L = 3.3H, CVP1 = CVP2 = CVP3 = 2.2F, COUT1 = COUT2 = COUT3 = 10F, TA = 25C, unless otherwise specified.)
REG1 Efficiency vs. Load Current
100 95 90 VOUT1 = 1.2V 100 95 90 ACT8796-003 3.6V
REG2 Efficiency vs. Load Current
ACT8796-004 VOUT2 = 2.8V 4.2V 3.6V
85 80 75 70 65 60 1 10
4.2V
Efficiency (%)
Efficiency (%)
85 80 75 70 65 60
100
1000
1
10
100
1000
Output Current (mA)
Output Current (mA)
OUT1 Regulation Voltage
0.545 ACT8796-005
OUT2 Regulation Voltage OUT2 Voltage Accuracy (%)
0.545 IOUT2 = 35mA 0.363 0.181 0.000 -0.181 -0.363 -0.545 ACT8796-006
OUT1 Voltage Accuracy (%)
IOUT1 = 35mA
0.363 0.181 0.000 -0.181 -0.363 -0.545 -40 -20 0 20 40 60 85
-40
-20
0
20
40
60
85
Temperature (C)
Temperature (C)
REG1 MOSFET Resistance
500 400 500 ACT8796-007
REG2 MOSFET Resistance
ACT8796-008
400 PMOS
PMOS
RDSON (m)
RDSON (m)
300 NMOS 200
300 NMOS 200
100
100
0 3 3.5 4.0 4.5 5.0 5.5
0 3 3.5 4.0 4.5 5.0 5.5
VP1 Voltage (V)
VP2 Voltage (V)
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 21 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS TYPICAL PERFORMANCE CHARACTERISTICS
(ACT8796QLCIA, VVP1 = VVP2 = VVP3 = 3.6V, L = 3.3H, CVP1 = CVP2 = CVP3 = 2.2F, COUT1 = COUT2 = COUT3 = 10F, TA = 25C, unless otherwise specified.)
REG3 Efficiency vs. Load Current
95 90 85 VOUT2 = 1.8V 3.6V 4.2V ACT8796-009
Efficiency (%)
80 75 70 60 65 55 50 1 10
100
1000
Output Current (mA)
OUT3 Regulation Voltage
0.666 ACT8796-010
OUT1 Voltage Accuracy (%)
IOUT1 = 35mA
0.444 0.222 0.0 -0.222 -0.444 -0.666 -40 -20 0 20 40 60 85
Temperature (C)
REG3 MOSFET Resistance
500 450 400 PMOS ACT8796-011
RDSON (m)
350 300 250 200 150 100 50 0 3 3.5 4.0 4.5
NMOS
5.0
5.5
VP3 Voltage (V)
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 22 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS FUNCTIONAL DESCRIPTION
General Description
REG1, REG2, and REG3 are fixed-frequency, current-mode, synchronous PWM step down converters that achieve peak efficiencies of up to 97%. REG1 and REG2 are capable of supplying up to 750mA of output current, while REG3 supports up to 550mA. These regulators operate with a fixed frequency of 1.6MHz, minimizing noise in sensitive applications and allowing the use of small external components. Each of the step-down DC/DCs are available with a variety of standard and custom output voltages, and each may be software-controlled via the I2C interface by systems that require advanced power management functions.
Programming the Output Voltage
By default, REG1, REG2, and REG3 each power up and regulate to their default output voltage. Once the system is enabled, each regulator's output voltage may be independently programmed to a different value, typically in order to reduce the power consumption of a microprocessor in standby mode. Program the output voltages via the I2C serial interface by writing to the REGx/VSETx[ ] and REGx/VRANGE[ ] registers.
Programmable Operating Mode
By default, REG1, REG2 ,and REG3 each operate in fixed-frequency PWM mode at medium to heavy loads, then transition to a proprietary power-saving mode at light loads in order to save power. In applications where low noise is critical, force fixedfrequency PWM operation across the entire load current range, at the expense of light-load efficiency, by setting the REGx/MODE[ ] bit to [1].
100% Duty Cycle Operation
REG1, REG2, and REG3 are each capable of operating at up to 100% duty cycle. During 100% dutycycle operation, the high-side power MOSFET is held on continuously, providing a direct connection from the input to the output (through the inductor), ensuring the lowest possible dropout voltage in battery powered applications.
Power-OK
REG1, REG2, and REG3 each feature a variety of status bits that can be read by the system microprocessor. If either output voltage is lower than the power-OK threshold, typically 6% below the programmed regulation voltage, REGx/OK[ ] will clear to 0.
Synchronous Rectification
REG1, REG2, and REG3 each feature integrated nchannel synchronous rectifiers, maximizing efficiency and minimizing the total solution size and cost by eliminating the need for external rectifiers.
Soft-Start
REG1, REG2, and REG3 each include matched soft-start circuitry. When enabled, the output voltages track the internal 80s soft-start ramp and both power up in a monotonic manner that is independent of loading on either output. This circuitry ensures that each output powers up in a controlled manner, greatly simplifying power sequencing design considerations.
Enabling and Disabling REG1, REG2, and REG3
Enable/disable functionality is typically implemented as part of a controlled enable/disable scheme utilizing nMSTR and other system control features of the ACT8796. REG1 and REG2 are automatically enabled whenever either of the following conditions re met: 1) nMSTR is driven low, or 2) PWRHLD is asserted high. When none of these conditions are true, or if a regulator's ON[_] bit is set to [0], REG1 and REG2 are disabled, and each regulator's quiescent supply current drops to less than 1A. REG3 is enabled whenever ON3 is asserted high, and is disabled whenever ON is asserted low or if the REG3/ON[_] bit is set to [0].
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
Compensation
REG1, REG2, and REG3 utilize current-mode control and a proprietary internal compensation scheme to simultaneously simplify external component selection and optimize transient performance over their full operating range. No compensation design is required; simply follow a few simple guidelines described below when choosing external components.
- 23 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS FUNCTIONAL DESCRIPTION (CONT'D)
Input Capacitor Selection
The input capacitor reduces peak currents and noise induced upon the voltage source. A 2.2F ceramic capacitor for each of REG1, REG2, and REG3 is recommended for most applications. sufficient distance from switching nodes to prevent noise injection. Finally, the exposed pad should be directly connected to the backside ground plane using multiple via to achieve low electrical and thermal resistance.
Output Capacitor Selection
For most applications, 10F ceramic output capacitors are recommended for REG1, REG2, and REG3. Although the these regulators were designed to take advantage of the benefits of ceramic capacitors, namely small size and very-low ESR, low-ESR tantalum capacitors can provide acceptable results as well.
Inductor Selection
REG1, REG2, and REG3 utilize current-mode control and a proprietary internal compensation scheme to simultaneously simplify external component selection and optimize transient performance over their full operating range. These devices were optimized for operation with 3.3H inductors, although inductors in the 2.2H to 4.7H range can be used. Choose an inductor with a low DCresistance, and avoid inductor saturation by choosing inductors with DC ratings that exceed the maximum output current of the application by at least 30%.
PCB Layout Considerations
High switching frequencies and large peak currents make PC board layout an important part of stepdown DC/DC converter design. A good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. Stepdown DC/DCs exhibit discontinuous input current, so the input capacitors should be placed as close as possible to the IC, and avoiding the use of via if possible. The inductor, input filter capacitor, and output filter capacitor should be connected as close together as possible, with short, direct, and wide traces. The ground nodes for each regulator's power loop should be connected at a single point in a star-ground configuration, and this point should be connected to the backside ground plane with multiple via. The output node for each regulator should be connected to its corresponding OUTx pin through the shortest possible route, while keeping
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 24 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS ELECTRICAL CHARACTERISTICS (REG4)
(VINL = 3.6V, COUT4 = 1F, TA = 25C, unless otherwise specified.)
PARAMETER
INL Operating Voltage Range INL UVLO Threshold UVLO Hysteresis Output Voltage Accuracy Line Regulation Error Load Regulation Error Power Supply Rejection Ratio
TEST CONDITIONS
VINL Input Rising VINL Input Falling VNOM4 < 1.3V, IOUT4 = 10mA VNOM4 1.3V, IOUT4 = 10mA VINL = Max(VOUT4 + 0.5V, 3.6V) to 5.5V IOUT4 = 1mA to 250mA f = 1kHz, IOUT4 = 250mA, COUT4 = 1F f = 10kHz, IOUT4 = 250mA, COUT4 = 1F Regulator Enabled Regulator Disabled IOUT4 = 120mA, VOUT4 > 3.1V
MIN
3.1 2.9
TYP
3 0.1
MAX
5.5 3.1
UNIT
V V V
-2.4% -1.2%
VNOM4 VNOM4 0 -0.004 60 50 40 0 100
+1.8% +1.8%
V mV %/mA dB
Supply Current per Output Dropout Voltage Output Current Current Limit3 Internal Soft-Start Power Good Flag High Threshold Output Noise Stable COUT4 Range Discharge Resistor in Shutdown
A 200 250 mV mA s % VRMS 20 F
VOUT4 = 95% of regulation voltage
280 100
VOUT4, hysteresis = -4% COUT4 = 10F, f = 10Hz to 100kHz 1 LDO Disabled, DIS4[ ] = [1]
89 40
650
: VNOM4 refers to the nominal output voltage level for VOUT4 as defined by the Ordering Information section. : Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage (for 2.8V output voltage or higher) 3: LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 30% (typ)
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 25 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS ELECTRICAL CHARACTERISTICS (REG5)
(VINL = 3.6V, COUT5 = 1F, TA = 25C, unless otherwise specified.)
PARAMETER
INL Operating Voltage Range INL UVLO Threshold UVLO Hysteresis Output Voltage Accuracy Line Regulation Error Load Regulation Error Power Supply Rejection Ratio
TEST CONDITIONS
VINL Input Rising VINL Input Falling TA = 25C TA = -40C to 85C VINL = Max(VOUT5 + 0.5V, 3.6V) to 5.5V IOUT5 = 1mA to 250mA f = 1kHz, IOUT5 = 250mA, COUT5 = 1F f = 10kHz, IOUT5 = 250mA, COUT5 = 1F Regulator Enabled Regulator Disabled IOUT5 = 120mA, VOUT5 > 3.1V
MIN
3.1 2.9
TYP
3 0.1
MAX
5.5 3.1
UNIT
V V V
-1.2 -2.5
VNOM5 VNOM5 0 -0.004 70 60 40 0 100
+2 +3
% mV %/mA dB
Supply Current per Output Dropout Voltage Output Current Current Limit
3
A 200 250 mV mA mA
VOUT5 = 95% of regulation voltage
280 100
Internal Soft-Start Power Good Flag High Threshold Output Noise Stable COUT5 Range Discharge Resistor in Shutdown LDO Disabled, DIS5[ ] = [1] VOUT5, hysteresis = -4% COUT5 = 10F, f = 10Hz to 100kHz 1
s % VRMS 20 F
89 40
650
: VNOM5 refers to the nominal output voltage level for VOUT5 as defined by the Ordering Information section. : Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage (for 2.8V output voltage or higher) 3: LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 30% (typ)
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 26 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS ELECTRICAL CHARACTERISTICS (REG6)
(VINL = 3.6V, COUT6 = 1F, TA = 25C, unless otherwise specified.)
PARAMETER
INL Operating Voltage Range INL UVLO Threshold UVLO Hysteresis Output Voltage Accuracy Line Regulation Error Load Regulation Error Power Supply Rejection Ratio
TEST CONDITIONS
VINL Input Rising VINL Input Falling TA = 25C TA = -40C to 85C VINL = Max(VOUT6 + 0.5V, 3.6V) to 5.5V IOUT6 = 1mA to 250mA f = 1kHz, IOUT6 = 250mA, COUT6 = 1F f = 10kHz, IOUT6 = 250mA, COUT6 = 1F Regulator Enabled Regulator Disabled IOUT6 = 120mA, VOUT6 > 3.1V
MIN
3.1 2.9
TYP
3 0.1
MAX
5.5 3.1
UNIT
V V V
-1.2 -2.5
VNOM6 VNOM6 0 -0.004 70 60 40 0 100
+2 +3
% mV %/mA dB
Supply Current per Output Dropout Voltage Output Current Current Limit3 Internal Soft-Start Power Good Flag High Threshold Output Noise Stable COUT6 Range Discharge Resistor in Shutdown
A 200 250 mV mA mA
VOUT6 = 95% of regulation voltage
280 100
s % VRMS 20 F
VOUT6, hysteresis = -4% COUT6 = 10F, f = 10Hz to 100kHz 1 LDO Disabled, DIS6[ ] = [1]
89 40
650
: VNOM6 refers to the nominal output voltage level for VOUT6 as defined by the Ordering Information section. : Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage (for 2.8V output voltage or higher) 3: LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 30% (typ)
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 27 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS REGISTER DESCRIPTIONS
Note: See Table 1 for default register settings.
Table 11: Control Register Map ADDRESS
03h 40h 41h 42h 43h
DATA D7
R R R R OK6
D6
VRANGE R R R OK5
D5
W/E ON5 ON6 OK4
D4
R
D3
VSET4 R
D2
R VSET5 VSET6
D1
R
D0
R
DIS6
DIS5
DIS4
W/E
R
R: Read-Only bits. Default Values May Vary. W/E: Write-Exact bits. Read/Write bits which must be written exactly as specified in Table 1.
Table 12: REG56 Control Register Bit Descriptions ADDRESS
03h 03h 03h 40h 40h 40h 41h 41h 41h 42h 42h 42h 43h 43h VSET6 ON6 VSET5 ON5
NAME
VSET4 VRANGE
BIT
[5:0] [6] [7] [4:0]
ACCESS
R/W R/W R R
FUNCTION
REG4 Output Voltage Selection REG4 Output Voltage Selection 0 1
DESCRIPTION
See Table 14 Min VOUT = 0.645V Min VOUT = 1.25V READ ONLY READ ONLY WRITE-EXACT READ ONLY
[5]
[7:6] [4:0] [5] [7:6] [4:0] [5] [7:6] [0] [1]
W/E
R R/W R/W R R/W R/W R R W/E REG6 Output Voltage Selection REG6 Enable 0 1 REG5 Output Voltage Selection REG5 Enable 0 1
See Table 13 REG5 Disable REG5 Enable READ ONLY See Table 13 REG6 Disable REG6 Enable READ ONLY READ ONLY WRITE-EXACT
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 28 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS REGISTER DESCRIPTIONS CONT'D
Table 12: Control Register Bit Descriptions (Cont'd) ADDRESS
43h
NAME
DIS4
BIT
[2]
ACCESS
R/W
FUNCTION
REG4 Discharge Enable 0 1 0 1 0 1 0 1 0 1 0 1
DESCRIPTION
Discharge Disable Discharge Enable Discharge Disable Discharge Enable Discharge Disable Discharge Enable Output is not OK Output is OK Output is not OK Output is OK Output is not OK Output is OK
43h
DIS5
[3]
R/W
REG5 Discharge Enable
43h
DIS6
[4]
R/W
REG6 Discharge Enable
43h
OK4
[5]
R
REG4 Power-OK
43h
OK5
[6]
R
REG5 Power-OK
43h
OK6
[7]
R
REG6 Power-OK
Table 13: REG56/VSETx[ ] Output Voltage Setting REG56CFG/VSETx[4:3] 00
1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1
REG56CFG/VSETx[2:0]
000 001 010 011 100 101 110 111
01
2.15 2.20 2.25 2.30 2.35 2.40 2.45 2.50
10
2.55 2.60 2.65 2.70 2.75 2.80 2.85 2.90
11
3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 29 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS REGISTER DESCRIPTIONS CONT'D
Table 14: REG4/VRANGE[ ] Output Voltage Setting REG4/VSET[5:4] REG4/VSET[3:0] 00
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
(N/A): Not Available
REG4/VRANGE[ ] = [0] 01
1.050 1.075 1.100 1.125 1.150 1.175 1.200 1.225 1.255 1.280 1.305 1.330 1.355 1.380 1.405 1.430
REG4/VRANGE[ ] = [1] 11
1.860 1.890 1.915 1.940 1.965 1.990 2.015 2.040 2.065 2.090 2.115 2.140 2.165 2.190 2.200 2.245
10
1.455 1.480 1.505 1.530 1.555 1.585 1.610 1.635 1.660 1.685 1.710 1.735 1.760 1.785 1.810 1.835
00
1.250 1.300 1.350 1.400 1.450 1.500 1.550 1.600 1.650 1.700 1.750 1.800 1.850 1.900 1.950 2.000
01
2.050 2.100 2.150 2.200 2.250 2.300 2.350 2.400 2.450 2.500 2.550 2.600 2.650 2.700 2.750 2.800
10
2.850 2.900 2.950 3.000 3.050 3.100 3.150 3.200 3.250 3.300 3.350 3.400 3.450 3.500 3.550 3.600
11
3.650 3.700 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A
0.645 0.670 0.695 0.720 0.745 0.770 0.795 0.820 0.845 0.870 0.895 0.920 0.950 0.975 1.000 1.025
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 30 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS TYPICAL PERFORMANCE CHARACTERISTICS
(ACT8796QLCIA, VVIN = 5V, TA = 25C, unless otherwise specified.)
Load Regulation
0.5 0.4 200 180 ACT8796-013
Dropout Voltage vs. Output Current
ACT8796-014
Output Voltage (V)
0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 0 25 50 75
Dropout Voltage (mV)
160 140 120 100 80 60 40 20 0 VIN = 3.3V
VIN = 3.1V
VIN = 3.6V
100 125 150 175 200 225 250
0
50
100
150
200
250
Load Current (mA)
Output Current (mA)
Output Voltage Deviation vs. Temperature
0.5 ACT8796-015
LDO Output Voltage Noise
ACT8796-016
Output Voltage Deviation (%)
0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 -40
ILOAD = 0mA
CH1
CREF = 10nF -15 10 35 60 85 CH1: VOUTx, 200V/div (AC COUPLED) TIME: 200ms/div
Temperature (C)
Region of Stable COUT ESR vs. Output Current
1 ACT8796-017
ESR ()
0.1 Stable ESR
0.01 0 50 100 150 200 250
Output Current (mA)
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 31 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS FUNCTIONAL DESCRIPTION
General Description
REG4, REG5, and REG6 are low-noise, lowdropout linear regulators (LDOs) that are optimized for low noise and high-PSRR operation, achieving more than 60dB PSRR at frequencies up to 10kHz.
Power-OK
Each of the LDOs features power-OK status bit that can be read by the system microprocessor via the I2C interface. If an output voltage is lower than the power-OK threshold, typically 6% below the programmed regulation voltage, the corresponding REG456CFG/OKx[ ] will clear to 0.
LDO Output Voltage Programming
All LDOs feature independently-programmable output voltages that are set via the I2C serial interface, increasing the ACT8796's flexibility while reducing total solution size and cost. Set the output voltage by writing to the REG456CFG/VSETx[ ] registers.
Reference Bypass Pin
The ACT8796 contains a reference bypass pin which filters noise from the reference, providing a low noise voltage reference to the LDOs. Bypass REF to G with a 0.01F ceramic capacitor.
Output Current Capability
REG4, REG5, and REG6 each supply an output current of 250mA. Excellent performance is achieved over this load current range.
Optional LDO Output Discharge
Each of the ACT8796's LDOs features an optional, independent output voltage discharge feature. When this feature is enabled, the LDO output is discharged to ground through a 1k resistance when the LDO is shutdown. This feature may be enabled or disabled via the I2C interface by writing to the REG456CFG/DISx[ ] bits.
Output Current Limit
In order to ensure safe operation under over-load conditions, each LDO features current-limit circuitry with current fold-back. The current-limit circuitry limits the current that can be drawn from the output, providing protection in over-load conditions. For additional protection under extreme over current conditions, current-fold-back protection reduces the current-limit by approximately 30% under extreme overload conditions.
Output Capacitor Selection
REG4, REG5, and REG6 each require only a small ceramic capacitor for stability. For best performance, each output capacitor should be connected directly between the OUTx and G pins as possible, with a short and direct connection. To ensure best performance for the device, the output capacitor should have a minimum capacitance of 1F, and ESR value between 10m and 200m. High quality ceramic capacitors such as X7R and X5R dielectric types are strongly recommended.
Enabling and Disabling the LDOs
REG4 is enabled whenever either of the following conditions are met: 1) nMSTR is driven low, or 2) PWRHLD is asserted high. Furthermore, once these conditions are met REG5 and REG6 maybe independently enabled or disabled via the I2C serial interface by writing the appropriate REG56/ONx[_] bit.
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 32 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS FUNCTIONAL DESCRIPTION (CONT'D)
PCB Layout Considerations
PCB Layout Considerations The ACT8796's LDOs provide good DC, AC, and noise performance over a wide range of operating conditions, and are relatively insensitive to layout considerations. When designing a PCB, however, careful layout is necessary to prevent other circuitry from degrading LDO performance. A good design places input and output capacitors as close to the LDO inputs and output as possible, and utilizes a star-ground configuration for all regulators to prevent noise-coupling through ground. Output traces should be routed to avoid close proximity to noisy nodes, particularly the SW nodes of the DC/DCs. REFBP is a filtered reference noise, and internally has a direct connection to the linear regulator controller. Any noise injected onto REFBP will directly affect the outputs of the linear regulators, and therefore special care should be taken to ensure that no noise is injected to the outputs via REFBP. As with the LDO output capacitors, the REFBP bypass capacitor should be placed as close to the IC as possible, with short, direct connections to the starground. Avoid the use of via whenever possible. Noisy nodes, such as from the DC/DCs, should be routed as far away from REFBP as possible.
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 33 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.
ACT8796
Rev1, 10-Oct-08
PACKAGE OUTLINE AND DIMENSIONS PACKAGE OUTLINE
TQFN44-24 PACKAGE OUTLINE AND DIMENSIONS
D D/2
SYMBOL
A A1
DIMENSION IN MILLIMETERS MIN MAX
0.800 0.050 0.700 0.000
DIMENSION IN INCHES MIN
0.028 0.000
MAX
0.031 0.002
E/2
PIN #1 INDEX AREA D/2 x E/2
E
A3 b D E D2
0.200 REF 0.180 3.850 3.850 2.500 2.500 0.300 4.150 4.150 2.800 2.800
0.008 REF 0.007 0.152 0.152 0.098 0.098 0.012 0.163 0.163 0.110 0.110
A A3 D2 L b A1
E2 e L R
0.500 BSC 0.350 0.450
0.020 BSC 0.014 0.018
0.200 TYP 0.200 ---
0.008 TYP 0.008 ---
e E2
PIN #1 INDEX AREA D/2 x E/2
K
R
K
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use as critical components in lifesupport devices or systems. Active-Semi, Inc. does not assume any liability arising out of the use of any product or circuit described in this datasheet, nor does it convey any patent license. Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact sales@activesemi.com or visit http://www.active-semi.com. For other inquiries, please send to: 1270 Oakmead Parkway, Suite 310, Sunnyvale, California 94085-4044, USA
Innovative PowerTM
ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics.
- 34 -
www.active-semi.com Copyright (c) 2008 Active-Semi, Inc.

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